Increased miniaturization of components, greater packaging density of integrated circuits (“ICs”), higher performance, and lower cost are ongoing goals of the computer industry. Semiconductor package structures continue to advance toward miniaturization, to increase the density of the components that are packaged therein while decreasing the sizes of the products that are made therefrom. This is in response to continually increasing demands on information and communication products for ever-reduced sizes, thicknesses, and costs, along with ever-increasing performance.
These increasing requirements for miniaturization are particularly noteworthy, for example, in portable information and communication devices such as cellular phones, hands-free cellular phone headsets, personal data assistants (“PDA's”), camcorders, notebook computers, and so forth. All of these devices continue to be made smaller and thinner to improve their portability. Accordingly, large-scale IC (“LSI”) packages that are incorporated into these devices are required to be made smaller and thinner. The package configurations that house and protect LSI require them to be made smaller and thinner as well.
Many conventional semiconductor (or “chip”) packages are of the type where a semiconductor die is molded into a package with a resin, such as an epoxy molding compound. Numerous package approaches stack multiple integrated circuit dice or package in package (PIP) or a combination. Other approaches include package level stacking or package on package (POP).
Typically semiconductor dice are attached to a laminate substrate either using a die attach adhesive, or in case of a flip chip using ball grid array attach method followed by an epoxy underfill. Both processes require elevated temperature to either cure the die attach adhesive, or to flow the solder.
The elevated temperature presents a number of issues such as package warpage due to differing coefficients of thermal expansion between the die, the adhesive, and the laminate substrate. Warpage causes failures such as cracks in solder, or broken dice.
An additional challenge is presented when a package is molded with a resin after a die is attached to a carrier. A mold chase or dam used to form an encapsulation may contact the die and cause the die to crack. Also contact of the mold chase with the substrate may cause mechanical stress and warpage. Traditionally warpage has been addressed by using a thick laminate substrate, however, such a solution results in a substrate price that is two to three times higher than that of a functionally equivalent thinner substrate.
Thus, a need still remains for an integrated circuit packaging system providing low cost manufacturing, improved yield, and improved reliability. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.